Defect Reduction Engineer

About Samsung Austin Semiconductor
Samsung is a world leader in advanced semiconductor technology, founded on the belief that the pursuit of excellence creates a better world. At Samsung Austin Semiconductor, we are Innovating Today to Power the Devices of Tomorrow. 

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Position Summary

We are seeking a highly skilled and experienced Defect Reduction Engineer to drive yield enhancement and process stability within our advanced semiconductor fabrication environment. This critical role focuses on the identification, analysis, and elimination of defect sources across multiple technology nodes, ranging from legacy production to leading-edge 14nm and foundry processes. The successful candidate will serve as the primary subject matter expert in defectivity, ensuring that our manufacturing processes meet the highest standards of quality and performance.

The core of this position involves leading Defect Reduction strategies for New Product Introduction (NPI), where you will independently define inline inspection methodologies and establish robust monitoring plans. You will be responsible for performing deep-dive correlation analyses of tool trend data to identify underperforming equipment and rapidly mitigate process excursions. By leveraging advanced inspection tools (Bright Field, Dark Field, E-beam) and analytical platforms like Klarity, you will trace defects to their root cause and implement permanent corrective actions.

Collaboration is central to this role. You will work autonomously yet synchronously with cross-functional teams, including Yield Enhancement (YE), Process Integration (PIE), and Unit Process (UP) engineering, to establish Best Known Methods (BKMs) and drive the reduction of "Single Wafer Low Yield" (SWLY) occurrence. Additionally, you will act as a key technical liaison for foundry customers and support the seamless transfer of new technologies from Samsung HQ in South Korea.

The ideal candidate is a self-starter with a minimum of 5 years of semiconductor working experience and a proven track record of solving chronic yield issues in a fast-paced environment. We are looking for a technical leader who can integrate quickly into our operations, manage multiple shifting priorities, and deliver results that directly impact our yield goals and product competitiveness.

Role and Responsibilities

Here's What You'll Be Responsible For:

New Product Introduction (NPI) & Ramp-up

• Strategic Planning: Serves as the primary representative for defect reduction during NPI, defining how parts will be inspected (strategy & methodology).
• Setup & Validation: Handles Global Process Management (GPM) setup, conducts specification audits, and performs comparisons to ensure standards are met.
• Impact Analysis: Evaluates how changes in unit processes or the distribution of parts across different tools (tool spread) affect inline and Non-Product Wafer (NPW) defectivity.

Process Monitoring & Root Cause Analysis

• Trend Analysis: Monitors fab process and tool data to identify "Dog Tools" (underperforming equipment).
• Excursion Control: Performs correlation analysis to trace defects back to their root cause, enabling rapid response to prevent widespread process excursions.

Cross-Functional Collaboration

• Inter-departmental Synergy: Works with Yield Enhancement (YE), Process Integration Engineering (PIE), and Unit Process (UP) teams.
• Optimization: Evaluates defect data to establish Best Known Methods (BKMs), monitors excursions, and focuses on SWLY (Single Wafer Low Yield) reduction to improve consistency.

Technology Node Management

• FCC Management: Establishes Fail Chip Count (FCC) and trend monitoring plans.
• Diverse Node Support: Manages a wide range of technology nodes, including: Advanced Nodes: 14nm and Foundry processes, Legacy Nodes: 65nm, 45nm, and 28nm.
• Operational Support: Leads/supports weekly module meetings to ensure yield and performance targets are achieved.

Customer & Global Relations

• Foundry Service: Acts as a technical point of contact for foundry customers, providing the necessary data and analysis to meet client expectations.
• Knowledge Transfer: Supports the transfer of new technologies and processes originating from Samsung HQ in South Korea to local sites.

Skills and Qualifications

Here's what you'll need:

Education: Bachelor’s degree in Electrical, Chemical, Mechanical Engineering, Material Science, Chemistry, Physics, or a related technical field. Master and PhD preferred

Professional Experience: Minimum of 5 years of proven experience in semiconductor process engineering, specifically specializing in defect monitoring, reduction, process integration, or yield engineering.

Technical Expertise:

• Advanced Nodes: Strong preference for candidates with a track record in leading-edge logic technology development (14nm or below).
• Equipment Knowledge: Deep understanding of semiconductor manufacturing equipment (e.g., Lithography, Etch, CMP) to effectively link defects to tool-specific root causes.
• Inspection Tooling: Proficiency in advanced defect inspection and review tools (e.g., Bright Field, Dark Field, E-beam, Vis-edge).

Analytical Mastery:

• Expert-level application of SPC and DOE methodologies to stabilize processes.
• Proficiency in Klarity Defect or similar advanced analytical platforms for defect classification and trend analysis.
• Strong data mining and troubleshooting capabilities to resolve chronic and ad-hoc yield killers independently.

Execution & Leadership:

• Demonstrated project management success in driving solutions for complex technical problems from identification to closure.
• Ability to manage multiple high-priority tasks in a fast-paced environment with minimal supervision.
• Excellent communication and presentation skills, with a proven ability to influence cross-functional teams (YE, PIE, UP).
• A self-starter mindset with a commitment to meeting strict deadlines and production schedules.

The current base salary range for this role is between $106,000 - $145,000. Individual base pay rates will depend on factors including duties, work location, education, skills, qualifications and experience. Total compensation for this position will include a competitive benefits package and may include participation in company incentive compensation programs, which are based on factors to include organizational and individual performance.

This position may include access to controlled information or technology under U.S. export control laws. Employment may be contingent on either the applicant verifying that the applicant falls under the “U.S. Person” definition (including U.S. citizens, U.S. lawful permanent residents, and those granted U.S. asylum or refugee status) or the employer timely obtaining any necessary export license under federal law. The employer evaluates export licensing on a case-by-case basis and may decline to proceed with a job applicant in its sole discretion, as export license applications can take many weeks to process.

Total Rewards
At Samsung Austin Semiconductor, base pay is just one part of our total compensation package. The base compensation for this role will depend on education, experience, skills, and location.

We offer a comprehensive benefits package, including:

• Medical, dental, and vision insurance
• Life insurance and 401(k) matching with immediate vesting
• Onsite café(s) and workout facilities
• Paid maternity and paternity leave
• Paid time off (PTO) + 2 personal holidays and 10 regular holidays
• Wellness incentives and MORE
   

Eligible full-time employees (salaried or hourly) may also receive MBO bonuses based on company, division, and individual performance.

All positions at Samsung Austin Semiconductor are full-time on-site.

Trade Secrets
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