Signal Integrity Engineering Manager

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Advantest
Screened
San Jose, California
Posted 1 week ago
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About the role

Job Overview

Advantest America, a leading Semiconductor Test and Measurement Company, is seeking innovative and self-driven individuals to join our Interconnect Solutions team. We are seeking an experienced Electrical Engineer to lead the Signal Integrity simulations team in the US. As an SI Engineering Manager; you will oversee SI engineering operations globally and will work collaboratively with other Advantest technology groups, Business Units, partners, and suppliers to develop and integrate advanced electrical and mechanical technologies into Advantest's automated test systems. This position is based at our headquarters in San Jose, CA, and requires periodic travel for customer visits and collaboration.

Responsibilities and Duties

  • Lead Signal Integrity team, manage engineering workforce, keep track of projects, schedules and work distribution, direction of SI team
  • Create SI team budgets, train SI engineering resources, direct and supervise SI operations
  • Develop and implement SI and PI (PDN, DC and AC) designs for new semiconductor test systems and components, including PCBA, Load Board and sockets. Target devices include high performance computing, AI and graphics devices with data rates of 64Gb/s and beyond.
  • Perform Signal Integrity and Power Integrity design and analysis of entire channel: including package, sockets, interposers, PCBA load board, cables.
  • Conduct integration testing, qualifications, and hands-on evaluation of prototype systems and sub-assemblies.
  • Create and manage test specifications and evaluation protocols, initiate engineering change order requests.
  • Interpret functional test results and present findings to senior staff.
  • Present designs during design and customer reviews.
  • Collaborate with manufacturing, quality assurance, and technical support teams to establish functional specifications and select suppliers for components and assemblies.
  • Provide guidance to lower-level staff, recommending and designing innovations, improved methods, tools, and processes.
  • Act as a customer contact on selective technical matters and analyze customer requirements.
  • Identify risk areas and optimization opportunities.
  • Take on project ownership and management; determine technology requirements and develop strategies.

Minimum Qualifications

  • BS in Electrical Engineering; MS in Electrical Engineering preferred.
  • BS + 8 years min or MS + 5 years min
  • Min 3+ years of experience of leading team of engineering talent
  • Expert level knowledge of
    • High speed signal and Power integrity requirements and design at PCB, Package and system level.
    • High speed channel simulation tools such as ADS, HFSS, CST
    • S-parameter modeling and simulations
    • High speed data communications (eye diagrams, BER testing)
    • PDN/Power Integrity (AC and DC) Design and Analysis at PCB and package level for high performance compute, AI and Graphics devices (featuring high power consumption and pin count).
  • Experienced with use of relevant lab instruments (high speed oscilloscopes, VNA, TDR, spectrum analyzer, Protocol Analyzers.
  • Practical knowledge of PCB construction, properties, and effect of PCB materials on signal quality.
  • Excellent teamwork and interpersonal skills; ability to work as part of a multi-disciplinary team (HW, ASIC, SW and Mechanical design engineers)
  • Strong analysis and synthesis capabilities.
  • Excellent verbal and written communication skills, alongside strong interpersonal and organizational abilities.
  • Competent in multitasking, prioritizing, and managing time effectively.
  • Ability to travel as required.

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