About the role
I am looking for a unique kind of architect for a brand new function, in a cutting-edge Quantum computing environment.
The System / SOC HW Architect role is for someone with significant years of experience in ASIC / SOC hardware architecture engineering - potentially from an R&D function, and with a proven track record of multiple tape-outs.
You will be a key technical contributor in shaping the integrated chip architecture of this exciting new blend of technologies.
This is a high level role - which will carry a lot of responsibility for the overall architecture, plus managing relationships with suppliers, the fab, and custom packaging houses for precise definitions.
Applicants need to have a confident background working in an R&D type function. Previous experience in new product assessment and selection is vital - so familiarity with new / advanced processes / advance nm technology nodes is required - you will be working on a complex SOC that blends new technology with traditional ASIC / SOC Silicon processes.
PICs, photonics, GaN, SiGe, FinFET, FD-SOI etc
2.5 - 3D packaging, SiP, complex chiplets and partitioning
Quantum experience is NOT required, but of course, a bonus. The nature of your experience with integrating different technologies and materials is more important.
Visa sponsorship and relocation support can be offered - for applicants with relevant skills.
Contact Rob Hudson for more information.
The System / SOC HW Architect role is for someone with significant years of experience in ASIC / SOC hardware architecture engineering - potentially from an R&D function, and with a proven track record of multiple tape-outs.
You will be a key technical contributor in shaping the integrated chip architecture of this exciting new blend of technologies.
This is a high level role - which will carry a lot of responsibility for the overall architecture, plus managing relationships with suppliers, the fab, and custom packaging houses for precise definitions.
Applicants need to have a confident background working in an R&D type function. Previous experience in new product assessment and selection is vital - so familiarity with new / advanced processes / advance nm technology nodes is required - you will be working on a complex SOC that blends new technology with traditional ASIC / SOC Silicon processes.
PICs, photonics, GaN, SiGe, FinFET, FD-SOI etc
2.5 - 3D packaging, SiP, complex chiplets and partitioning
Quantum experience is NOT required, but of course, a bonus. The nature of your experience with integrating different technologies and materials is more important.
Visa sponsorship and relocation support can be offered - for applicants with relevant skills.
Contact Rob Hudson for more information.
About this listing
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