About the role
FPGA ENGINEER – ULTRA-LOW LATENCY SYSTEMSLocation: London (Hybrid: 4 days onsite)Sector: Quant Trading / High-Performance ComputingQuant Capital is partnering with a global trading firm building a greenfield FPGA team focused on low-latency, high-throughput hardware systems. This small, senior group will deliver high-speed compute infrastructure integrated directly into trading, research, and networking pipelines.What You’ll Be DoingDesigning and implementing latency-optimised FPGA systems in Verilog/SystemVerilogDeveloping high-speed modules (PCIe, Ethernet, DDR/QDR) with deep pipeliningUsing simulation and formal tools (Verilator, Cocotb, etc.) for validationWorking across teams (ASIC, software, infra) to co-design tightly coupled platformsContributing to tooling, flow, and potentially DSL extensionsWhat We’re Looking ForStrong RTL skills with experience building complex, optimised designsProgramming skills, C, C++ or similarSolid grasp of timing closure, datapath design, and hardware-level performance tuningFamiliar with toolchains (Vivado, Quartus) and debugging workflowsComfortable working close to hardware and owning the full development cycleInterest in improving hardware workflows or applying high-level techniquesBonusBackground in trading systems, signal processing, or networkingExperience with formal verification and/or hardware DSLsKnowledge of FPGA-based networking accelerationWhy Join?Build from scratch with a team driving real strategy and architectural decisionsWork across the full lifecycle, from concept to deploymentDeep technical ownership, minimal overhead, and real impactCollaborate with top engineers in a no-bureaucracy cultureAll enquiries handled in strict confidence. Your profile will only be shared with your permission.
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